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1 ? fn6505.1 caution: these devices are sensitive to electrosta tic discharge; follow proper ic handling procedures. 1-888-intersil or 1-888-468-3774 | intersil (and design) is a registered trademark of intersil americas inc. copyright ? intersil americas inc. 2008, 2009. all rights reserved. all other trademarks mentioned are the property of their respective owners. isl29020 a low power, high se nsitivity, light-to digital sensor with i 2 c interface the isl29020 is a low power, hi gh sensitivity, integrated light sensor with i 2 c (smbus compatible) interface. its state-of-the-art photodiode array provides close-to human eye response and good ir rejection. this adc is capable of rejecting 50hz and 60hz flicker caused by artificial light sources. the lux range select feature allows the user to program the lux range for optimized counts/lux. in normal operation, typical power consumption 55a. in order to further minimize power consumption, two power-down modes have been prov ided. if polling is chosen over continuous measurement of light, the auto-power-down function shuts down the whole chip after each adc conversion for the measurement. the other power-down mode is controlled by software via the i 2 c interface. the power consumption can be reduced to less than 1a when powered down. designed to operate on supplies from 2.25v to 3.3v with i 2 c supply from 1.7v to 3.6v, the isl29020 is specified for operation over the -40c to +8 5c ambient temperature range. block diagram features ?low power - 65a max operating current - 0.5a max shutdown current - software shutdown and automatic shutdown ? ideal spectral response - close to human eye response - excellent ir and uv rejection ? easy to use - simple output code directly proportional to lux -i 2 c (smbus compatible) output - no complex algorithms needed - variable conversion resolution up to 16-bits - adjustable sensitivity up to 65 counts per lux - works under various light sources, including sunlight - selectable range (via i 2 c) - range 1 = 0.015 lux to 1,000 lux - range 2 = 0.06 lux to 4,000 lux - range 3 = 0.24 lux to 16,000 lux - range 4 = 0.96 lux to 64,000 lux - temperature compensated - integrated 50/60hz noise rejection ? small form factor - 2.0mmx2.1mmx0.7mm 6 ld odfn package ? additional features -i 2 c and smbus compatible - 1.7v to 3.6v supply for i 2 c interface - 2.25v to 3.3v supply - address selection pin ? pb-free (rohs compliant) applications ? display and keypad dimming for: - mobile devices: smart phone, pda, gps - computing devices: notebook pc, webpad - consumer devices: lcd-tv, digital picture frame, digital camera ? industrial and medical light sensing pinout isl29020 (6 ld odfn) top view ordering information part number (note) package (pb-free) pkg. dwg. # ISL29020IROZ-T7* 6 ld odfn l6.2x2.1 isl29020iroz-evalz evaluation board (pb-free) *please refer to tb347 for detai ls on reel specifications. note: these intersil pb-free pl astic packaged products employ special pb-free material sets; molding compounds/die attach materials and nipdau plate - e4 te rmination finish, which is rohs compliant and compatible with both snpb and pb-free soldering operations. intersil pb-free produc ts are msl classified at pb-free peak reflow temperatures that meet or exceed the pb-free requirements of ipc/jedec j std-020. vdd rext gnd sda scl command register integrating adc data register photodiode light 3 2 5 6 1 f osc iref counter 2 16 gain/range ext shdn int time 4 a0 isl29020 timing process array data mode i 2 c/smbus 1 2 3 6 5 4 vdd gnd rext sda scl a 0 *exposed pad can be connected to gnd or electrically isolated data sheet august 20, 2009
2 fn6505.1 august 20, 2009 absolute maxi mum ratings (t a = +25c) thermal information v dd supply voltage between v dd and gnd . . . . . . . . . . . . . 3.6v i 2 c bus pin voltage (scl, sda) . . . . . . . . . . . . . . . . . -0.2v to 3.6v i 2 c bus pin current (scl, sda) . . . . . . . . . . . . . . . . . . . . . . <10ma rext, a0 pin voltage . . . . . . . . . . . . . . . . . . . . . . . . . -0.2v to v dd esd rating human body model . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .2kv thermal resistance ja (c/w) 6 ld odfn . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 88 maximum die temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . +90c storage temperature . . . . . . . . . . . . . . . . . . . . . . . .-40c to +100c operating temperature . . . . . . . . . . . . . . . . . . . . . . .-40c to +85c pb-free reflow profile. . . . . . . . . . . . . . . . . . . . . . . . .see link below http://www.intersil.com/pbfree/pb-freereflow.asp caution: do not operate at or near the maximum ratings listed fo r extended periods of time. exposure to such conditions may adv ersely impact product reliability and result in failures not covered by warranty. important note: all parameters having min/max specifications are guaranteed. typical values are for information purposes only. u nless otherwise noted, all tests are at the specified temperature and are pulsed tests, therefore: t j = t c = t a electrical specifications v dd = 3v, t a = +25c, r ext = 500k 1% tolerance, 16-bit adc operation, unless otherwise specified. parameter description condition min typ max unit v dd power supply range 2.25 3.3 v i dd supply current 55 65 a i dd1 supply current when powered down software disabled or auto power-down 0.01 0.5 a v i 2 c supply voltage range for i 2 c interface 1.7 3.6 v f osc internal oscillator frequency 650 725 800 khz t int adc integration/conversion time 16-bit adc data 90 ms f i 2 c i 2 c clock rate range 1 to 400 khz data_0 count output when dark e = 0 lux, range 1 (1k lux) 1 5 counts data_f full scale adc code 65535 counts data data count output variation over three light sources: fluorescent, incandescent and sunlight ambient light sensing 10 % data_1 light count output with lsb of 0.015 lux/count e = 300 lux, fluorescent light (note 1), ambient light sensing, range 1 (1k lux) 15000 20000 25000 counts data_2 light count output with lsb of 0.06 lux/count e = 300 lux, fluorescent light (note 1), ambient light sensing, range 2 (4k lux) 5000 counts data_3 light count output with lsb of 0.24 lux/count e = 300 lux, fluorescent light (note 1), ambient light sensing, range 3 (16k lux) 1250 counts data_4 light count output with lsb of 0.96 lux/count e = 300 lux, fluorescent light (note 1), ambient light sensing, range 4 (64k lux) 312 counts data_ir1 infrared count output e = 210 lux, sunlight (note 2), ir sensing, range 1 15000 20000 25000 data_ir2 infrared count output e = 210 lux, sunlight (note 2), ir sensing, range 2 5000 data_ir3 infrared count output e = 210 lux, sunlight (note 2), ir sensing, range 3 1250 data_ir4 infrared count output e = 210 lux, sunlight (note 2), ir sensing, range 4 312 v ref voltage of r ext pin 0.52 v v il scl and sda input low voltage 0.55 v v ih scl and sda input high voltage 1.25 v i sda sda current sinking capability 4 5 ma notes: 1. 550nm green led is used in production test. the 550nm led irradi ance is calibrated to produce the same data count against an illuminance level of 300 lux fluorscent light. 2. 850nm green led is used in production test. the 850nm led irr adiance is calibrated to produce the same data_ir count against an illuminance level of 210 lux sunlight at sea level. isl29020
3 fn6505.1 august 20, 2009 principles of operation photodiodes and adc the isl29020 contains two photodiode arrays which convert light into current. the spectral response for ambient light sensing and ir sensing is show n in figure 8 in the ?typical performance curves? on page 9. after light is converted to current during the light signal process, the current output is converted to digital by a single built-in 16-bit analog-to-digital converter (adc). an i 2 c command reads the ambient light or ir intensity in counts. the converter is a charge-balancing integrating type 16-bit adc. the chosen method for conversion is best for converting small current signals in the presence of an ac periodic noise. a 100ms integration time, for instance, highly rejects 50hz and 60hz power line noise simultaneously. see ?integration time or conversion time? on page 6 and ?noise rejection? on page 7. the built-in adc offers user flexibility in integration time or conversion time. there are two timing modes: internal timing mode and external timing mode. in internal timing mode, integration time is determined by an internal oscillator (f osc ), and the n-bit (n = 4, 8, 12,16) counter inside the adc. in external timing mode, integration time is determined by the time between two consecutive i 2 c external timing mode commands. see ?external timing mode? on page 6. a good balancing act of integration time and resolution depending on the application is required for optimal results. the adc has i 2 c programmable ranges to dynamically accommodate various lighting conditions. for very dim conditions, the adc can be configured at its lower range (range 1). for bright conditi ons, the adc can be configured at its higher range (range 2). i 2 c interface there are three 8-bit registers available inside the isl29020. the command register defines the operation of the device. the command register does not change until the register is overwritten. the two data regi sters are read-only for 16-bit adc output or timer output. th e data registers contain the adc's or timer?s latest digital output. the isl29020?s i 2 c interface slave address can be selected as 1000100 or 1000101 by connecting a0 pin to gnd or vdd, respectively. when 1000100x or 1000101x with x as r or w is sent after the start condition, this device compares the first seven bits of this byte to its address and matches. figure 1 shows a sample one-byte read. figure 2 shows a sample one-byte write. figure 3 shows a sync_i 2 c timing diagram sample for externally controlled integration time. the i 2 c bus master always drives the scl (clock) line, while either the master or the slave can drive the sda (data) line. every i 2 c transaction begins with the master asserting a start condition (sda falling while scl remains high). the following byte is driven by the master, and includes the slave address and read/write bit. the receiving device is responsible for pulling sda low during the acknowledgement period. every i 2 c transaction ends with the master asserting a stop condition (sda rising while scl remains high). for more information about the i 2 c standard, please consult the philips ? i 2 c specification documents. low-power operation the isl29020 initial operation is at the power-down mode after a supply voltage is provided. the data registers contain the default value of 0. when the isl29020 receives an i 2 c command to do a one-time measurement from an i 2 c master, it will start light sensing and adc conversion. it will go to the power-down mode automatically after one conversion is finished and keep the conversion data available for the master to fetch anytime afterwards. the isl29020 will continuously do light sensing and adc conversion if it receives an i 2 c command of continuous measurement. it will continuously update the data registers with the latest conversion data. it will go to the power-down mode after it receives the i 2 c command of power-down. pin descriptions pin number pin name description 1 vdd positive supply; connect this pin to a 2.25v to 3.3v supply. 2 gnd ground pin. 3 rext external resistor pin for adc reference; co nnect this pin to ground through a (nominal) 500k resistor. 4a 0 bit 0 of i 2 c address; ground or tie this pin to vdd. no floating. 5scli 2 c serial clock the i 2 c bus lines can be pulled from 1.7v to above v dd , 3.6v max. 6sdai 2 c serial data isl29020
4 fn6505.1 august 20, 2009 figure 1. i 2 c read timing diagram sample start w a a a6 a5 a4 a3 a2 a1 a0 w a r7 r6 r5 r4 r3 r2 r1 r0 a a6 a5 a4 a3 a2 a1 a0 w a a a ad7d6d5d4d3d2d1d0 1357 1357 123 45 6 9 2 4 6 stop start sda driven by master device address sda driven by isl29020 data byte0 register address device address i 2 c data sda driven by master sda driven by master 2468 924689 78135789 i 2 c sda in i 2 c sda out i 2 c clk figure 2. i 2 c write timing diagram sample start w a a a6 a5 a4 a3 a2 a1 a0 w a r7 r6 r5 r4 r3 r2 r1 r0 a b7 b6 b5 b4 b3 b2 b1 b0 a a 12615948 stop sda driven by master functions register address device address sda driven by master sda driven by master i 2 c data i 2 c sda in i 2 c sda out i 2 c clk in aa 345 7 89 234 678 12 3 5 67 9 a figure 3. i 2 c sync_i 2 c timing diagram sample a 6 a5 a4 a3 a2 a1 a0 w a r7r6r5r4r3r2r1r0 a a 15 4 start w astop register address device address a register address register address i 2 c data i 2 c sda in i 2 c sda out i 2 c clk in sda driven by master sda driven by master a 234 6789123 56789 isl29020
5 fn6505.1 august 20, 2009 register set there are three 8-bit regist ers in the isl29020. table 1 summarizes their functions. command register (00 hex) the read/write command register has five functions: 1. enable: bit 7. this bit enables the isl29020 with logic 1 and powers down isl29020 with logic 0. 2. measurement mode: bit 6. this bit controls the two measurement modes of the device. a logic 0 puts the device in the one-time measurement mode in which the device is automatically shut-down after each measurement. a logic 1 puts the device in the continuous measurement mode in which data is collected continuously. 3. light sensing: bit 5. this bi t programs the device to do the ambient light or the infrared (i r) light sensing. a logic 0, requests for the ambient light sensing and a logic 1 requests for the ir sensing. 4. timing mode and resolution: bits 4, 3 and 2. these three bits determine whether the integration time is done internally or externally, and the number of bits for adc. in internal timing mode, integration time is determined by an internal oscillator (f osc ) and the n-bit (n = 4, 8, 12, 16) counter inside the adc. in external timing mode, the integration time is determined by the time between two consecutive sync_i 2 c pulse commands. with bit 4 set to 0, the device is configured to run in the internal-timing mode. for example, the command register content should be 1xx000xx to request 16-bit adc in the internal-timing mode. with bit 4 set to 1, the device is configured to run in the external-timing mode. for the external timing, the command 1xx101xx needs to be sent to request the timer data, the number of clock cycles counted within the duration between the two sync pulses (refer to table 2). the timer count is read from register 01h (lsb) and 02h (msb). the command 1xx100xx needs to be sent to request the adc conversion. the adc data is also read from register 01h (lsb) and 02h (msb). bits 3 and 2 determine the number of clock cycles per conversion in the internal-timing mode. changing the number of clock cycles does more than just change the resolution of the device. it also changes the integration time, which the adc uses to sample the photodiode current signal for a measurement. table 1. register set addr reg name bit default 765 4 321 0 00h command en mode light res2 res1 res0 range1 range0 00h 01h data lsb d7 d6 d5 d4 d3 d2 d1 d0 00h 02h data msb d15 d14 d13 d12 d11 d10 d9 d8 00h table 2. write only registers address name functions/description b1xxx_xxxx sync_i 2 c writing a logic 1 to this address bit ends the current adc-integration and starts another. used only with external timing mode. table 3. enable bit 7 operation 0 power-down the device 1 enable the device table 4. measurement mode bit 6 operation 0 one-time measurement 1 continuous measurement table 5. light sensing bit 5 operation 0 ambient light sensing 1 infrared light sensing table 6. timing mode and resolution bits 4:3:2 mode 0:0:0 internal timing, 16-bit adc data output 0:0:1 internal timing, 12-bit adc data output 0:1:0 internal timing, 8-bit adc data output 0:1:1 internal timing, 4-bit adc data output 1:0:0 external timing, adc data output 1:0:1 external timing, timer data output 1:1:0 reserved 1:1:1 reserved isl29020
6 fn6505.1 august 20, 2009 . 5. range: bits 1 and 0. the full scale range (fsr) can be adjusted via i 2 c using bits 1 and 0. table 8 lists the possible values of fsr for the 500k r ext resistor. data registers (01 hex and 02 hex) the device has two 8-bit read-only registers to hold a 16-bit data from adc or timer. the most significant byte is accessed at 02 hex, and the least significant byte is accessed at 01 hex. the registers are refreshed after every conversion cycle. calculating lux the isl29020?s adc output codes, data, are directly proportional to lux in the ambient light sensing, as shown in equation 1. here, e cal is the calculated lux reading. the constant is determined by the full scale range and the adc?s maximum output counts. the constant can also be viewed as the sensitivity: the smalle st lux measurement the device can measure, as shown in equation 2. here, range(k) is defined in table 8. count max is the maximum output counts from the adc. the transfer function used for each timing mode becomes: internal timing mode here, n = 4, 8, 12 or 16. this is the number of adc bits programmed in the command register. 2 n represents the maximum number of counts possible from the adc output in internal-timing mode. data is the adc output stored in the data registers (01 hex and 02 hex). external timing mode here, timer sets up the adc? s maximum count reading and it is the number of clock cycl es accrued in the integration time (set by sync_i 2 c pulses) in external-timing mode. it is stored in the data registers 01h and 02h when the command is coded as 1xx101xx. data is the adc output. in this mode, the command has to be sent out again with code 1xx100xx to request the adc output dat a from registers 01h and 02h. external scaling resistor r ext for f osc and range the isl29020 uses an external resistor r ext to fix its internal oscillator frequency, f osc and the light sensing range, range. f osc and range are inversely proportional to r ext . for user simplicity, the proportionality constant is referenced to 500k : integration time or conversion time integration time is the per iod during which the device?s analog-to-digital adc converter samples the photodiode current signal for a measurement . integration time, in other words, is the time to complete the conversion of analog photodiode current into a digital signal (number of counts). integration time affects the measurement resolution. for better resolution, use a longer integration time. for short and fast conversions, use a shorter integration time. the isl29020 offers user flexibility in the integration time to balance resolution, speed and nois e rejection. integration time can be set internally or externally by programming the bit 4 of the command register 00(hex). integration time in internal-timing mode most applications will use the internal-timing mode. in this mode, f osc and adc n-bits resolution determine the integration time, t int, as shown in equation 7. where n is the number of bits of resolution and n = 4, 8, 12 or 16. 2 n , therefore, is the number of clock cycles. n can be programmed at the command re gister 00(hex) bits 3 and 2. table 7. resolution/width bits 3:2 number of clock cycles 0:0 2 16 = 65,536 0:1 2 12 = 4,096 1:0 2 8 = 256 1:1 2 4 = 16 table 8. range/fsr lux bits 1:0 k range(k) fsr (lux) @ als sensing fsr (lux) @ ir sensing 0:0 1 range1 1,000 refer to page 2 0:1 2 range2 4,000 refer to page 2 1:0 3 range3 16,000 refer to page 2 1:1 4 range4 64,000 refer to page 2 table 9. data registers address (hex) contents 01 least-significant byte of most recent adc or timer data. 02 most-significant byte of most recent adc or timer data. e cal data = (eq. 1) range k () count max ---------------------------- = (eq. 2) (eq. 3) e range k () 2 n --------------------------- data = (eq. 4) e range k () timer --------------------------- data = (eq. 5) range 500k r ext ------------------ range k () = (eq. 6) f osc 500k r ext ------------------ 725 khz = t int 2 n 1 f osc ------------- - 2 n r ext 725khz 500k ---------------------------------------------- == (eq. 7) isl29020
7 fn6505.1 august 20, 2009 integration time in external timing mode the external timing mode is recommended when the integration time is needed to synchronize to an external signal, such as a pwm to eliminate noise. the synchronization can be implemented by using i 2 c sync command. the 1st i 2 c sync command starts the conversion. the 2nd completes the conversion then starts over again to commence the next conversion. the integration time, t int , is the time interval between the two sync pulses: where timer is the number of internal clock cycles obtained from data registers and f osc is the internal oscillator frequency. the internal oscillator, f osc , operates identica lly in both the internal and external timing modes. however, in external timing mode, the number of cl ock cycles per integration is no longer fixed at 2 n . the number of clock cycles varies with the chosen integration time, and is limited to 2 16 = 65,536. in order to avoid erroneous readings the integration time must be short enough not to allow an overflow in the counter register. noise rejection in general, integrating type adcs have excellent noise-rejection characteristi cs for periodic noise sources whose frequency is an integer multiple of the conversion rate. for instance, a 60hz ac unwanted signal?s sum from 0ms to k*16.66ms (k = 1,2...k i ) is zero. similarly, setting the device?s integration time to be an integer multiple of the periodic noise signal, greatly improves the light sensor output signal in the presence of noise. optical design flat window lens design a window lens will surely limit the viewing angle of the isl29020. the window lens sh ould be placed directly on top of the device. the thickness of the lens should be kept at minimum to minimize loss of power due to reflection and also to minimize loss due to absorption of energy in the plastic material. a thickness of t = 1mm is recommended for a window lens design. the bigger the diameter of the window lens, the wider the viewing angle is of the isl29020. table 11 shows the recommended dimensions of the optical window to ensure both 35 and 45 viewing angle. these dimensions are based on a window lens thickness of 1.0mm and a refractive index of 1.59. window with light guide design if a smaller window is desired while maintaining a wide effective viewing angle of the is l29020, a cylindrical piece of transparent plastic is needed to trap the light and then focus and guide the light onto the dev ice. hence, the name light guide or also known as light pipe. the pipe should be placed directly on top of the devic e with a distance of d1 = 0.5mm to achieve peak performance. the light pipe should have minimum of 1.5mm in diameter to ensure that whole area of the sensor will be exposed. see figure 5. table 10. integration time of n-bit adc r ext (k ) n = 16-bit n = 12-bit n = 8-bit n = 4-bit 250 50ms 3.2ms 200s 12.5s 500** 100ms 6.25ms 390s 24s 1000 200ms 12.5ms 782s 49s 1500 300ms 18.8ms 1.17ms 73s 2000 400ms 25ms 1.56ms 98s **recommended r ext resistor value t int timer f osc ---------------- - = (eq. 8) t int 65,535 f osc ----------------- - < (eq. 9) table 11. recommended dimensions for a flat window design d total d1 d lens @ 35 viewing angle d lens @ 45 viewing angle 1.5 0.50 2.25 3.75 2.0 1.00 3.00 4.75 2.5 1.50 3.75 5.75 3.0 2.00 4.30 6.75 3.5 2.50 5.00 7.75 t = 1 thickness of lens d1 distance between isl29020 and inner edge of lens d lens diameter of lens d total distance constraint between the isl29020 and lens outer edge * all dimensions are in mm. d lens ? t d1 d total ? = viewing angle window lens isl29020 figure 4. flat window lens e = data 2 16 x 1000 isl29020
8 fn6505.1 august 20, 2009 suggested pcb footprint it is important that the us ers check the ?surface mount assembly guidelines for optical dual flatpack no lead (odfn) package? before starting odfn product board mounting. http://www.intersil. com/data/tb/tb477.pdf layout considerations the isl29020 is relatively insensitive to layout. like other i 2 c devices, it is intended to provide excellent performance even in significantly noisy environments. there are only a few considerations that w ill ensure best performance. route the supply and i 2 c traces as far as possible from all sources of noise. use one 0. 01f power-supply decoupling capacitor, placed close to the device. typical circuit a typical application for the isl29020 is shown in figure 6. the isl29020?s i 2 c address is hardwired as 1000100. the device can be tied onto a system?s i 2 c bus together with other i 2 c compliant devices. soldering considerations convection heating is recommended for reflow soldering; direct-infrared heating is not recommended. the plastic odfn package does not require a custom reflow soldering profile, and is qualified to +260c . a standard reflow soldering profile with a +260c maximum is recommended. d lens t l d lens light pipe isl29020 d 2 d 2 > 1.5mm figure 5. window with light guide/pipe figure 6. isl29020 typical circuit vdd 1 gnd 2 rext 3 a 0 4 scl 5 sda 6 isl29020 r1 10k r2 10k rext 500k c1 0.01f 2.25v to 3.3v microcontroller sda scl i 2 c slave_0 i 2 c slave_1 i 2 c slave_n i 2 c master scl sda scl sda 1.7v to 3.6v isl29020
9 fn6505.1 august 20, 2009 typical performance curves (v dd = 3v, r ext = 500k ) figure 7. spectral response of light sources f igure 8. spectral response for ambient light sensing and ir sensing figure 9. radiation pattern figure 10. sensitivity to three light sources figure 11. output code for 0 lux vs temperature figure 12. output code vs temperature 0 0.2 0.4 0.6 0.8 1.0 1.2 300 400 500 600 700 800 900 1000 1100 wavelength (nm) normalized light intensity sun halogen incandescent fluorescent -0.2 0 0.2 0.4 0.6 0.8 1.0 1.2 300 400 500 600 700 800 900 1000 1100 wavelength (nm) normalized response human eye ir sensing ambient light sensing radiation pattern luminosity angle relative sensitivity 90 80 70 60 50 40 30 20 10 0 10 20 30 40 50 60 70 80 90 0.2 0.4 0.6 0.8 1.0 0 100 200 300 400 500 600 700 800 900 1000 0 100 200 300 400 500 600 700 800 900 1000 lux meter reading (lux) calculated als reading (lux) incandescent halogen fluorescent als sensing range 1 (1k lux) 16-bit adc adc output (count) 0 32768 65535 1000 lux e cal = 2 16 x data output code (counts) temperature (c) 0 2 4 6 8 10 -60 -20 20 60 100 0 lux output code ratio (from +30c) temperature (c) 0.90 0.95 1.00 1.05 1.10 -60 -20 20 60 100 300 lux fluorescent light als sensing range 1 (1k lux) isl29020
10 all intersil u.s. products are manufactured, asse mbled and tested utilizing iso9000 quality systems. intersil corporation?s quality certifications ca n be viewed at www.intersil.com/design/quality intersil products are sold by description only. intersil corpor ation reserves the right to make changes in circuit design, soft ware and/or specifications at any time without notice. accordingly, the reader is cautioned to verify that data sheets are current before placing orders. information furnishe d by intersil is believed to be accurate and reliable. however, no responsibility is assumed by intersil or its subsidiaries for its use; nor for any infringements of paten ts or other rights of third parties which may result from its use. no license is granted by implication or otherwise under any patent or patent rights of intersil or its subsidiari es. for information regarding intersil corporation and its products, see www.intersil.com fn6505.1 august 20, 2009 figure 13. supply current vs temperature typical performance curves (v dd = 3v, r ext = 500k ) (continued) supply current (a) temperature (c) 40 45 50 55 -50 -25 0 25 50 75 100 125 v dd = 2.25v 2.10 2.00 sensor offset 0.59 0.34 1 6 5 2 4 3 0.23 figure 14. sensor location outline isl29020
11 fn6505.1 august 20, 2009 isl29020 package outline drawing l6.2x2.1 6 lead optical dual flat no-lead plastic package (odfn) rev 0, 9/06 located within the zone indicated. the pin #1 identifier may be unless otherwise specified, tolerance : decimal 0.05 tiebar shown (if present) is a non-functional feature. the configuration of the pin #1 identifier is optional, but must be between 0.15mm and 0.30mm from the terminal tip. dimension b applies to the metallized terminal and is measured dimensions in ( ) for reference only. dimensioning and tolerancing conform to amse y14.5m-1994. 6. either a mold or mark feature. 3. 5. 4. 2. dimensions are in millimeters. 1. notes: (4x) 0.10 index area pin 1 a 2.10 b 2.00 c seating plane base plane 0.08 0.10 see detail "x" c c 0 . 00 min. detail "x" 0 . 05 max. 0 . 2 ref c 5 side view typical recommended land pattern ( 6x 0 . 30 ) ( 6x 0 . 55 ) 6 top view (0 . 65) (1 . 95) (0 . 65) (1 . 35) bottom view 6x 0 . 35 0 . 05 b 0.10 ma c 1 1 . 35 1 . 30 ref index area pin 1 6 0.65 0 . 65 max 0.75 6x 0 . 30 0 . 05

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